The present disclosure relates to manufacturing multi-layer electronic circuits, and more specifically, techniques for forming conductive vias between conductive layers of the multi-layer electronic circuits using a healing layer.
Within multi-layer electronic circuits, such as printed circuit boards (PCBs), conductive vias may be used to form connections between the different conductive layers. In some cases, the vias are formed as “barrels” or conductive cylinders that extend at least partway through the multi-layer electronic circuit. Controlling the dimensions of the vias may have increased importance with increased data speeds of the multi-layer electronic circuits. For example, the stubs of the vias can cause unwanted resonant frequency nulls which appear in the insertion loss plot of the channel. If the resonant frequency null occurs near the Nyquist frequency corresponding to the bit rate, a high bit-error-rate or even a link failure may result. Generally, reducing the via stub length can shift the resonant frequency nulls away from the Nyquist frequency, and improve communication performance and/or reliability.
Mechanical techniques such as back-drilling may be used to control the stub length of vias. However, back-drilling tends to increase the manufacturing costs and may suffer reliability issues. Further, once a via has been back-drilled, it may be no longer possible to probe the location of the via on the multi-layer electronic circuits. Thus, using back-drilled vias it may be difficult to manufacture cost-effective PCBs, measure high-speed interfaces during system bring-up and model-to-hardware correlation activities, and/or maximize the electrical performance of the interfaces.